View MB89215MB89P215MB89PV210_293564.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12558-1E
8-bit Proprietary Microcontrollers
CMOS
F2MC-8L MB89210 Series
MB89215/P215/PV210
s DESCRIPTION
The MB89210 series is a one-chip microcontroller that features a compact instruction set and contains a range of peripheral functions including timers, a serial interface, A/D converters and external interrupts.
s FEATURES
* * * * * * * * * * F2MC-8L CPU core Maximum memory spaces : 64 Kbytes Minimum instruction execution time : 0.32 s to 5.12 s (at 12.5 MHz) Interrupt processing time : 2.88 s to 46.08 s (at 12.5 MHz) I/O port : Max 22 21-bit time base timer 8-bit PWM timer 8-/16-bit capture timer/counter : 2 ch Watchdog timer 12-bit PPG timer
(Continued)
s PACKAGE
30-pin Plastic SSOP 48-pin Ceramic MQFP
(FPT-30P-M02)
(MQP-48C-P02)
MB89210 Series
(Continued) * 10-bit A/D converter : 8 ch * LIN-UART * 8-bit serial I/O * External Interrupt : 3 ch * External or CR (built-in) oscillation clock, switchable * Low power consumption modes (stop modes, sleep modes) * Package : SSOP-30,MQFP-48 * CMOS technology
2
MB89210 Series
s PRODUCT LINEUP
Part number Parameter Type ROM capacity RAM capacity MB89215 For mass products (Mask ROM product) 16 Kbyte (Built-in ROM) 512byte Number of basic instructions Instruction bit length Instruction length Data bit length Minimum instruction execution time Interruption processing time MB89P215 One-time product (for small-scale production) 16 Kbyte (Built-in PROM) 512byte MB89PV210 Piggy back/ Evaluation product (for development) 32 Kbyte (External EPROM) 1.92Kbyte
CPU functions
: 136 : 8 bits : 1 to 3 bytes : 1, 8, and 16 bits : 0.32 s to 5.12 s (at 12.5 MHz) : 2.88 s to 46.08 s (at 12.5 MHz)
Ports 21-bit time base timer Watchdog timer 8-bit PWM timer
General purpose I/O port x 21 (also usable as resources) General purpose input port x1 21 bits Interrupt cycle : at 10 MHz (0.82 ms,3.3 ms,26.2 ms,419.4 ms) Reset generation cycle : at 10 MHz (Min 419.4 ms) 8-bit interval timer operation (supports square wave output, operating clock period : 0.4 s to 25.6 s) 8-bit resolution PWM operation (conversion period : 102.4 s to 26.84 s )
Peripheral functions
8-bit capture timer/counter x 1 channel + 8-bit timer 8/16-bit capture timer or 16-bit capture timer/counter x 1 channel counter Capable of event count operation and square wave output using external clock input with 8-bit timer 0 or 16-bit counter LIN-UART 8-bit serial I/O 12-bit PPG timer External interrupt circuit Full duplex, Synchronous/asynchronous transfer (with start/stop bit), Capable of setting over 30,000 different baud rates using a 15-bit reload counter Support for the LIN protocol, slave nodes, and LIN synch break/sync field detection 8-bit length, Selectable LSB first or MSB first Transfer clock (0.8 s external, 0.8 s, 3.2 s, 12.8 s internal) Output requency : Selectable pulth width and cycle (Cycle : 1.6 s to 419.3 ms ) 3-channel (interrupt vector, request flag, requesr output acceptance) Edge selectable (selectable rising, falling or both edge) Can be use for recovery from stop or sleep mode (edge detection also available in stop mode). 10-bit accurasy x 8-channel A/D conversion function (conversion time : 15.2 s/10 MHz) Continuous activation by an 8-/16-bit timer/counter output or time base timer output capable. Sleep mode and Stop mode 3.5 V to 5.5 V Yes 3.5 V to 5.5 V Yes 3.5 V to 5.5 V No
A/D converter Standby mode Operating voltage * CR(built-in) oscillator
* : The minimum operating voltage varies with the operating frequency, the function and the connected ICE. Note : Unless otherwise stated, clock periods and conversion times are for 10 MHz operation with the internal clock operating at maximum speed. 3
MB89210 Series
s PACKAGES AND CORRESPONDING PRODUCTS
Package FPT-30P-M02 MQP-48C-P02 Power supply pins O : Yes x : No MB89215 O MB89P215 O MB89PV210
x*
O Vcc,Vss x 2,AVcc,AVss
x
Vcc,Vss x 2
x
* : Adapter for 48-pin to 30-pin conversion (manufactured by Sunhayato Corp.) Part number : 48QF-30SOP-8L Inquiry : Sunhayato Corp. TEL : (81)-3-3984-7791 FAX : (81)-3-3971-0535 E-mail : adapter@sunhayato.co.jp
s DIFFERENCES AMONG PRODUCTS
1. Memory space
When this product is used in a piggy-back or other evaluation configuration, it is necessary to carefully confirm the differences between the model being used and the product it is evaluating.
2. Current Consumption
* On the MB89P210, the additional current consumed by the EPROM is added at the connecting socket on the back side. * When operating at low speed, the current consumption in the one-time PROM or EPROM models is greater than on the mask ROM models. However, current consumption in sleep or stop modes is identical. However, in sleep/stop mode the current consumption is the same.
4
MB89210 Series
s PIN ASSIGNMENT
(TOP VIEW)
P04/INT0 P05/INT1 P06/INT2 P07/EC0 MODA RST C Vss X1 X0 P30/PWM/TO1 P31 P10/SCK P11/SO P12/SI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
P03/AN7 P02/AN6 P01/AN5 P00/AN4 P23/AN3 P22/AN2 P21/AN1 P20/AN0 Vss Vcc P17/PPG P16/UI P15/UO P14/UCK/EC1 P13/TO0
(FPT-30P-M02)
(Continued)
5
MB89210 Series
(Continued)
(TOP VIEW)
P06/INT2 P05/INT1 P04/INT0
N.C.
N.C.
N.C.
N.C.
N.C. 39
N.C. 38
N.C.
48
47
46
45
44
43
42
41
40
37
36
P07/EC0 MODA RST X0 X1 Vss Vcc P30/PWM/TO1 P31 P10/SCK P11/SO P12/SI
1 3 4 5 6 7 8 9 10 11 12 69 70 71 72 73 74 75 76 60 59 58 57 56 55 54 53
N.C.
Vss
N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. P03/AN7 P02/AN6 P01/AN5 P00/AN4
68 67 66 65 64 63 62 61
2
35 34 33 32 31 30 29 28 27 26 25
77 78 79 80 49 50 51 52
13
14
15
16
17
18
19
20
21
22 P21/AN1
AVss
P13/TO0
P14/UCK/EC1
P15/UO
P16/UI
P17/PPG
AVcc
N.C.
P20/AN0
P22/AN2
23
(MQP-48C-P02)
Pin no. 49 50 51 52 53 54 55 56
Pin Vpp A12 A7 A6 A5 A4 A3 N.C.
Pin no. 57 58 59 60 61 62 63 64
Pin N.C. A2 A1 A0 O1 O2 O3 VSS
Pin no. 65 66 67 68 69 70 71 72
Pin O4 O5 O6 O7 O8 CE A10 N.C.
P23/AN3
24
Pin no. 73 74 75 76 77 78 79 80
Pin OE N.C. A11 A9 A8 A13 A14 VCC
N.C. : Internal connection only. Not for use.
6
MB89210 Series
s PIN DESCRIPTIONS
Pin no. SSOP*1 MQFP*2 10 9 5 4 5 2 Pin name X0 X1 MODA Circuit type A C/D*3 Function Connecting pins to crystal oscillator or other oscillator. When using ecternal clock, input to X0 and X1 is left open. Input pins for memory access mode setting. Connect directly to VSS. Reset I/O pin. This pin has pull-up resistance with N-ch open drain or hysteresis input. At an internal reset request, an "L" signal is output. An "L" level input initializes the internal circuits. General purpose I/O port. Hysteresis input. These pins also functions as the analog input of A/D converter. General purpose I/O port. These pins also functions as the external interrupt input. Hysteresis input. General purpose I/O port. This pin also functions as external clock of 8-/16-bit capture timer/ counter 0 or capture input pin. Hysteresis input. General purpose I/O port. This pin also functions as clock input/output pin of serial I/O. Hysteresis input. General purpose I/O port. This pin also functions as the data output pin of serial I/O. Hysteresis input. F General purpose I/O port. This pin also functions as the data input pin of serial I/O. Hysteresis input. General purpose I/O port. This pin also functions as the output pin of 8-/16-bit capture timer/ counter 0. Hysteresis input. General purpose I/O port. This pin also functions as the clock input/output pin of LIN-UART and the external clock of 8-/16-bit capture timer/counter 1 or capture input pin. Hysteresis input. General purpose I/O port. This pin also functions as the data output pin of LIN-UART. Hysteresis input
6
3
RST
E
27 to 30 25 to 28
P00/AN4 to P03/AN7 P04/INT0 to P06/INT2
G
1 to 3
46 to 48
4
1
P07/EC0
13
10
P10/SCK
14
11
P11/SO
15
12
P12/SI
16
13
P13/TO0
17
14
P14/UCK/ EC1
18
15
P15/UO
*1 : FPT-30P-M02 *2 : MQP-48C-P02 *3 : Only MB89P215 is C.
(Continued)
7
MB89210 Series
(Continued) Pin no.
SSOP*1 19 MQFP*2 16
Pin name
Circuit type H
Function General purpose I/O port. This pin also functions as the data input pin of LIN-UART. General port input is hysteresis and resource input is CMOS. General purpose I/O port. This pin also functions as 12-bit PPG timer output. Hysteresis input. General purpose I/O port. Shared for A/D converter analog input pin. Hysteresis input. General purpose I/O port. This pin also functions as the output pin of 8-bit PWM and 8-/16-bit capture timer/counter 1. Hysteresis input. General purpose I/O port of CMOS type. Power supply pin. Power supply pin (GND). Use the both pins at the same voltage level. A/D converter power supply pin. Apply potential under VCC to this pin. A/D converter power supply pin (GND). Use at the same voltage level as the VSS supply. This is the power supply stabilization capacitor pin for MB89P215. Connect an external capacitor of 0.1 F. MB89215 is not internally connected. It is unnecessary to connect a capacitor. Internal connect pin. Be sure this pin is left open.
P16/UI
20
17
P17/PPG
F
23 to 26 21 to 24
P20/AN0 to P23/AN3
G
11
8
P30/PWM/ TO1 P31 VCC VSS AVCC AVSS
F
12 21 8,22
9 7 6,43 20 19
B
7
18, 29 to 42, 44,45
C
N.C.
*1 : FPT-30P-M02 *2 : MQP-48C-P02
8
MB89210 Series
s EXTERNAL EPROM PIN DESCRIPTION (MB89PV210 only)
Pin no. 49 50 51 52 53 54 55 58 59 60 61 62 63 64 65 66 67 68 69 70 71 73 75 76 77 78 79 80 56 57 72 74 Pin name Vpp A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 VSS O4 O5 O6 O7 O8 CE A10 OE A11 A9 A8 A13 A14 VCC I/O O "H" level output pin. Function
O
Address output pin.
I O
Data input pin. Power supply pin (GND).
I
Data input pin.
O O O
Chip acceptance pin for ROM. Output "H" at standby. Address output pin. Output acceptance pin for ROM. Output "L" usually.
O
Address output pin.
O
Power supply pin for EPROM. Internal connect pin. Must be left open.
N.C.
9
MB89210 Series
s I/O CIRCUIT TYPE
Type Circuit Remarks * Oscillator feedback resistance : approx. 1 M
X1
A
X0
Standby control signal * CMOS input B
* Hysteresis input C
D
* With pull-down resistance : approx. 50 k(5V) * Hysteresis input
Pch
* Output pull-up resistance (Pch) approx. 50 k (5V) * Hysteresis input
E
Nch
Pch
Pull-up control bit
Pch
* CMOS output * Hysteresis input * Selectable by pull-up resistor register
F
Nch
(Continued)
10
MB89210 Series
(Continued)
Type Circuit Pull-up control bit
Pch
Remarks * * * * CMOS output Hysteresis input Analog input Selectable by pull-up resistor register
Pch
G
Nch
Analog input
A/D acceptance * * * * CMOS output Hysteresis input CMOS input Selectable by pull-up resistor register
Pch
Pull-up control bit
Pch
H
Nch
11
MB89210 Series
s HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input or output pins other than the medium-and high-voltage pins or if voltage higher than the rating is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off. To supply power, turn on the digital power supply (VCC) and then the analog power supply (AVCC).
2. Treatment of Unused Input Pins
Leaving unused input teminals open may lead to permanent damage due to malfunction and latchup; pull up or pull down the terminals through the resistors of 2 k or more. Make the unused I/O terminal in a state of output and leave it open and if it is in an input state, handle it with the same procedure as the input terminals.
3. Treatment of N.C. Pins
Any pins marked "NC" (not connected) must be left open.
4. Power Supply Voltage Fluctuations
Although Vcc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important.As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms.
5. Treatment of power supply pin
All VSS power suppluy pin must be use at the same voltage level. Connect to be AVCC = VCC, AVSS = VSS even if the A/D converters are not in use in MB89PV210.
6. Notes on Using External Clock
When an external clock is used, oscillation stabilization time is required for even power-on reset and release from stop mode.
7. Notes on using the CR (internal) oscillator
To use the CR (internal) oscillator as the operating clock for the MB89215 or MB89P215, adjust the timer value and baud rate setting.
8. Program Execution in RAM
When the MB89PV210 is used with an emulation pod other than the MB2144-508, no program can be executed in RAM. 12
MB89210 Series
9. Operation check for evaluating the LIN-UART
When the MB89215 or MB89P215 uses the CR (internal) oscillator as the clock for the LIN-UART, the evaluation program (MB89PV210 [customized for external oscillation]) requires an operation check within a range of oscillation frequencies from 8.5 MHz to 11.5 MHz.
10. Handling reset pin
Reset pin must be inputted external reset.
13
MB89210 Series
11. Up/down conversion circuit stabilization waiting time
MB89210 series contains the following products and the operating characteristics vary with whether they contain the internal stepdown circuit.
Product name MB89215 MB89P215 MB89PV210
Operating voltage * 3.5 V to 5.5 V 3.5 V to 5.5 V 3.5 V to 5.5 V
Down conversion not built-in built-in not built-in
* : The minimum operating voltage varies with the operating frequency, the function and the connected ICE. The same built-in resources are used for the above product types; operating sequences after the power-on reset are different depending on whether they have the internal voltages step-down circuit. The operating sequences after the power-on reset with the different models will be described below.
Power supply (VCC) CPU operation of built-in down-conversion circuit product (MB89P215) CPU operation of built-in down-conversion circuit product (MB89215,MB89PV210)
step-down circuit stabilization waiting time + oscillation stabilization waiting time
(217/FCH-2) (218/FCH)
Oscillation stabilization waiting time
(218/FCH)
* : FCH-2 FCH
Start of CPU operation for the product Start of CPU operation for the product having the internal voltage step-down not having the internal voltage circuit (Reset vector) step-down circuit (Reset vector) : CR (built-in) oscillation : Base oscillator
As described above, CPU starts at delayed time with the product having the internal voltage step-down circuit compared with the product not having the internal voltage step-down circuit. This is because the time should be allowed for the stabilization time for voltage step-down circuit for normal operation. Note : As the period of the oscillation is unstable immediately after oscillation starts, the listed oscillation stabilization delay times are guides only.
12. Treatment of analog input
The analog input also serves as a general-purpose input/output port. The A/D enable register is initialized at a reset. When the intermediate-level signal is input in port input mode (ADEN:ADEx = 0), an input leakage current flows to the gate. Set the corresponding pin to an analog input. 14
MB89210 Series
s PROGRAMMING TO OTPROM ON THE MB89P215
1. Memory space
Normal operation mode
Address
0000H
I/O 0080H RAM 512 byte 0280H
Prohibited
Corresponding addresses on serial writer Address
C000H
C000H
PROM 16 Kbyte
PROM 16 Kbyte
FFFFH
FFFFH
2. Programming to the OTPROM
To program to the OTPROM using an EPROM programmer AF220/AF210/AF120/AF110 (manufacturer : Yokogawa Digital Computer Corp.). Inquiry : Yokogawa Digital Computer Corp. : TEL(81)-42-333-6224 Note : Programming to the OTPROM with MB89P215 is serial programming mode only.
3. Programming Adaptor for OTPROM
To program to the OTPROM using an EPROM programmer AF220/AF210/AF120/AF110, use the programming adapter (manufacturer : Sunhayato Corp.) listed below. Adaptor socket : ROM3-FPT30M02-8L3 Inquiry : Sunhayato Corp. : TEL : (81)-3-3984-7791 FAX : (81)-3-3971-0535 E-mail : adapter@sunhayato.co.jp
4. Programming yields
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times. 15
MB89210 Series
s EPROM WRITING TO PIGGY-BACK/EVALUATION CHIPS
1. EPROM model
MBM27C256A-20TVM
2. Writer adapter
For writing to EPROM using a ROM writer, use one of the writer adapters shown below (manufactured by Sunhayato) . Package LCC-32 Adapter socket model ROM-32LC-28DP-S
Inquiries should be addressed to Sunhayato Corp. : TEL : (81)-3-3984-7791 FAX : (81)-3-3971-0535 E-mail : adapter@sunhayato.co.jp
3. Memory space
Shown below the memory space in each mode. Normal operation mode Address
0000H I/O 0080H RAM 1.92 Kbyte 0800H
Prohibited
Corresponding address on ROM writer Address
0000H
8000H
PROM 32 Kbyte
EPROM 32 Kbyte
FFFFH
7FFFH
4. Writing to EPROM
(1) Set up the EPROM writer for the MBM27C256A. (2) Load program data on to the EPROM programmer at 0000H to 7FFFH. (3) Program 0000H to 7FFFH with the EPROM programmer. 16
MB89210 Series
s BLOCK DIAGRAM
CR (built-in) oscillator
X0 X1
Oscillation circuit
Time base timer
General-purpose I/O ports
PLL clock control Port 3 8 bits PWM
RST
Reset circuit
General-purpose I/O ports
P30/PWM/TO1
Built-in data bus
8-/16-bit capture timer/counter 1
P31 P10/SCK P11/SO P12/SI
P06/INT2 P07/EC0 P00/AN4 to P03/AN7 4
Port 0
P04/INT0 P05/INT1
3
External interrupt
8/16-bit serial I/O
4
8/16-bit capture timer/counter 0
P13/TO0
Port 2
P20/ AN0 to P23/AN3
4
4 LIN- UART General-purpose I/O ports
Port 1
A/D converter
Capture input switching circuit
P14/UCK/EC1 P15/UO P16/UI
Baud rate generator RAM 12-bit PPG
F2MC-8L CPU P17/PPG
Other pins
Vcc,Vss,MODA,C ROM
General-purpose I/O ports
17
MB89210 Series
s CPU CORE
1. Memory space
The MB89210 series has 64 KB of memory space, containing all I/O, data areas, and program areas. The I/O area is located at the lowest addresses, with the data area placed immediately above. The data area can be partitioned into register areas, stack areas, or direct access areas depending on the application. The program area is located at the opposite end of memory, closest to the highest addresses, and the highest part of this area is assigned to the tables of interrupt and reset vectors and vector call instructions. The following diagram shows the structure of memory space in the MB89210 series.
MB89215
0000H I/O 0080H RAM 512 byte 0100H 0100H 0080H 0000H
MB89P215
0000H I/O 0080H RAM 512 byte 0100H
MB89PV210
I/O
RAM 1.92 Kbyte
Register
0200H 0280H
Register
Register
0200H 0800H
0200H 0280H
Prohibited
Prohibited
Prohibited
8000H C000H ROM16Kbyte FFFFH FFFFH C000H PROM16Kbyte FFFFH ROM32Kbyte
18
MB89210 Series
2. Register
The MB89210 series has two types of registers; the registers dedicated to specific purposes in the CPU and the general-purpose registers. The dedicated registers are as follows: Program counter (PC) Accumulator (A) Temporary accumulator (T) Index register (IX) Extra pointer (EP) Stack pointer (SP) Program status (PS) : 16-bit length, shows the locations where instructions are stored. : 16-bit length, a temporary memory register for calculation operations. In the case of an 8-bit data processing instruction, the lower one byte is used. : 16-bit length, performs calculations with the accumulator. In the case of an 8-bit data processing instruction, the lower one byte is used. : 16-bit length, a register for index modification. : 16-bit length, apointer indicating memory addresses. : 16-bit length, indicates stack areas. : 16-bit length, contains register pointer and condition code.
16 bits
PC A T IX EP SP RP PS CCR
: Program counter : Accumulator : Temporary accumulator : Index register : Extra pointer : Stack pointer : Program status
Initial value FFFDH Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate I-flag = 0, IL1, 0 = 11 Initial values for other bits are indeterminate.
19
MB89210 Series
The PS register can further be divided into the register bank pointer in the higher 8 bits (RP) and the condition code register in the lower 8 bits (CCR). (See the diagram below.)
RP bit15 bit14 bit13 bit12 bit11 bit10 bit9 R4 R3 R2 R1 R0 - - bit8 - bit7 H bit6 I bit5 IL1 CCR bit4 IL0 bit3 N bit2 Z bit1 V bit0 C
CCR initial value
X011XXXXB
PS
H-flag I-flag Interrupt level bit N-flag 0-flag V-flag C-flag X : Undefined
20
MB89210 Series
The RP points to the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule shown next. Rule for Conversion of Actual Addresses in the General-purpose Register Area RP higher bits
"0" "0" "0" "0" "0" "0" "0" A9 "1" A8 R4 A7 R3 A6 R2 A5 R1 A4 R0 A3
OP code lower bits
b2 A2 b1 A1 b0 A0
Generated address
A15 A14 A13 A12 A11 A10
The CCR consists of the bits indicating arithmetic operation results or transfer data contents and the bits that control CPU operations at the time of an interrupt. H flag : Set to 1 if calculations result in carry operations from bit 3 to bit 4 or borrow operations from bit 4 to bit 3, otherwise set to 0. The flag is for decimal adjustment instructions; do not use for other than additions and subtractions. This flag is set to 1 if interrupts are enabled, and 0 if interrupts are prohibited. The default value at : reset is 0. : Indicates the level of the interrupt currently enabled. An interrupt is processed only if its level is higher than the value this bit indicates. IL0 0 1 0 1 : : : : Interrupt level 1 2 3 Lower = no interruption High-low Higher
I flag IL1, 0
IL1 0 0 1 1 N flag Z flag V flag C flag
Set to 1 if the highest bit is 1 after a calculation, otherwise cleared to 0. Set to 1 if a calculation result is 0, otherwise cleared to 0. Set to 1 if a 2's complement overflow results during a calculation, otherwise cleared to 0. Set to 1 if a calculation results in a carry or borrow operation from bit 7, otherwise cleared to 0. This is also the shift-out value in a shift instruction.
21
MB89210 Series
The following general-purpose registers are provided: General-purpose registers: 8-bit length, data storage registers The general-purpose registers are 8 bits in length and located in the register banks in the memory. One bank contains eight registers and the MB89210 series allow a total of 16 banks to be used at maximum. The bank currently in use is indicated by the register bank pointer (RP).
Register Bank Configuration This address = 0100H + 8 x (RP)
R0 R1 R2 R3 R4 R5 R6 R7
16 banks
Memory area
22
MB89210 Series
s I/O MAP
Address 0000H 0001H 0002H to 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000FH 0010H 0011H 0012H 0013H 0014H 0015H 0016H 0017H 0018H 0019H 001AH 001BH 001CH 001DH 001EH 001FH 0020H 0021H 0022H 0023H 0024H 0025H CNTR COMR EIC1 EIC2 PWM control register PWM Compare register External interrupt control register 1 (edge) External interrupt control register 2 (edge) TCCR0 TCR10 TCR00 TDR10 TDR00 TCPH0 TCPL0 TCR20 PDR3 DDR3 RCR21 RCR22 RCR23 RCR24 Port 3 data register Port 3 direction register 12-bit PPG control register 1 12-bit PPG control register 2 12-bit PPG control register 3 12-bit PPG control register 4 Access prohibited Capture control register 0 Timer 1 control register 0 Timer 0 control register 0 Timer 1 Data 0 Timer 0 Data 0 Capture data register H 0 Capture data register L 0 Timer output control 0 Access prohibited R/W W R/W R/W 0-000000 XXXXXXXX 00000000 00000000 R/W R/W R/W R/W R/W R R R/W 00000000 000-0000 00000000 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ------00 PDR1 DDR1 RSFR PDR2 DDR2 Port 1 data register Port 1 direction register Reset flag register Port 2 data register Port 2 direction register Access prohibited R/W R/W R/W R/W R/W R/W - - - - - - XX -------0 00000000 --000000 0-000000 --000000 SYCC STBC WDTC TBTC Register name PDR0 DDR0 Register description Port 0 data register Port 0 direction register Access prohibited System clock control register Standby control register Watchdog timer control register Time base timer control register Access prohibited R/W R/W R R/W R/W XXXXXXXX 00000000 XXXX - - - - - - - - XXXX ----0000 R/W R/W W R/W 1--11100 00010--- 0 - - -XXXX 00---000 Read/write R/W R/W Initial value XXXXXXXX 00000000
(Continued)
23
MB89210 Series
Address 0026H 0027H 0028H 0029H 002AH 002BH 002CH 002DH 002EH 002FH 0030H 0031H 0032H 0033H 0034H 0035H to 0038H 0039H 003AH 003BH to 0040H 0041H 0042H 0043H 0044H 0045H 0046H 0047H 0048H 0049H 004AH to 005FH 0060H 0061H to 006FH
Register name
Register description Access prohibited
Read/write
Initial value
SCR USMR SSR RDR TDR ESCR ECCR BGRH BGRL ADC1 ADC2 ADDH ADDL ADEN
Serial control register LIN-UART serial mode register Serial status register Recieving data register Sending data register Extended status control register Extended communication control register Baud rate generator register H Baud rate generator register L A/D control register 1 A/D control register 2 A/D data register H A/D data register L A/D enable register Access prohibited
R/W R/W R/W R W R/W R/W R/W R/W R/W R/W R/W R/W R/W
00000000 00000000 00001000 00000000 11111111 00000X00 00000011 -0000000 00000000 00000000 00000001 0 0 0 0 0 0 XX XXXXXXXX 00000000
SMR SDR
Serial mode register Serial Data register Access prohibited
R/W R/W
00000000 XXXXXXXX
TCCR1 TCR11 TCR01 TDR11 TDR01 TCPH1 TCPL1 TCR21 TCSL
Capture control register 1 Timer 1 control register 1 Timer 0 control register 1 Timer 1 Data register 1 Timer 0 Data register 1 Capture status register H1 Capture status register L1 Timer output control register 1 Capture input select register Access prohibited
R/W R/W R/W R/W R/W R R R/W R/W
00000000 000-0000 00000000 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ------00 -------0
XCRS*
External/CR(built-in)oscillation clock control register Access prohibited
R/W
00-00010
(Continued)
24
MB89210 Series
(Continued) Address Register name
0070H 0071H 0072H 0073H 0074H to 007AH 007BH 007CH 007DH 007EH 007FH * : Only for MB89215, MB89P215 Description of write/read symbols : R/W : Read/write enabled R : Read only W : Write only Description of initial values 0 1 X : This bit initialized to "0". : This bit initialized to "1". : The initial value of this bit is undefined. : This bit is not defined. ILR1 ILR2 ILR3 ILR4 PUL0 PUL1 PUL2 PUL3
Register description Port 0 pull-up setting register Port 1 pull-up setting register Port 2 pull-up setting register Port 3 pull-up setting register Access prohibited Interrupt level setting register 1 Interrupt level setting register 2 Interrupt level setting register 3 Interrupt level setting register 3 Access prohibited
Read/write R/W R/W R/W R/W
Initial value 00000000 00000000 ----0000 -------0
W W W W
11111111 11111111 11111111 11111111
Note : If a bit manipulation instruction accesses the serial mode register (SMR), a write-only register, or a register containing a write-only bit, the bit focused on by the instruction is set to a prescribed value but a malfunction occurs when the other bits contains a write-only bit. Do not use bit manipulation instructions to access such registers.
25
MB89210 Series
s ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter Power supply voltage Input voltage Output voltage Maximum clamp current Maximum clamp total current "L" level output current "L" level average current "L" level total output current "H" level output current "H" level average current "H" level total output current Power consumption Storage temperature *: * * * * * * * * * * Symbol VCC VI VO ICLAMP |ICLAMP| IOL IOLAV IOL IOH IOHAV IOH Pd Tstg Rating Min VSS - 0.3 VSS - 0.3 VSS - 0.3 - 0.4 - 55 Max VSS + 6.0 VCC + 0.3 VSS + 6.0 + 0.4 10 10 4 50 - 10 -4 - 50 200 + 150 Unit V V V mA mA mA mA mA mA mA mA mW C Average value (operating current x operating duty) Average value (operating current x operating duty) * * Remarks
Applicable to pins : P00 to P07, P10 to P17, P20 to P23, P30 to P31 Use within recommended operating conditions. Use at DC voltage (current) . The +B signal should always be applied with a limiting resistance placed between the +B signal and the microcontroller. The value of the limiting resistance should be set so that when the +B signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect other devices. Note that if a +B signal is input when the microcontroller current is off (not fixed at 0 V), the power supply is provided from the pins, so that incomplete operation may result. Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on reset. Care must be taken not to leave the +B input pin open. Note that analog system input/output pins other than the A/D input pins (LCD drive pins, comparator input pins, etc.) cannot accept +B signal input. (Continued)
26
MB89210 Series
(Continued) * Sample recommended circuits :
* Input/Output Equivalent circuits
Protective diode
VCC
Limiting resistance +B input (0 V to 16 V)
P-ch
N-ch
R
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
27
MB89210 Series
2. Recommended Operating Conditions
Parameter Symbol Value Min 3.5 3.0 VIH Input "H" voltage 0.7 VCC Max 5.5 5.5 VCC + 0.3 VCC + 0.3 0.3 VCC Unit V V V Remarks Normal Operation Assurance Range (MB89215) RAM status in stop mode P31,UI MODA, RST, P00 to P07, P10 to P17,P20 to P23,P30, INT0 to INT2, EC0, EC1,SCK, SI, UCK P31,UI MODA, RST, P00 to P07, P10 to P17,P20 to P23,P30, INT0 to INT2, EC0, EC1,SCK, SI,UCK
Power supply voltage
VCC
VIHS
0.8 VCC VSS - 0.3 VSS - 0.3 - 40
V
VIL Input "L" voltage
V
VILS
0.2 VCC + 105
V C
Operating temperature
Ta
6
5
Range of warranted analog precision Operation Assurance Range
Operating voltage VCC (V)
4
3
2
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Operating frequency (MHz) WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
28
MB89210 Series
3. DC Characteristics
(VCC = 5.0 V 10%, VSS = 0.0 V, FCH = 10 MHz (external clock), Ta = -40 C to +105 C) Pin name P31,UI MODA, RST, P00 to P07, P10 to P17, P20 to P23,P30, INT0 to INT2, EC0, EC1,SCK,SI, UCK P31,UI MODA, RST, P00 to P07, P10 to P17, P20 to P23,P30, INT0 to INT2, EC0, EC1,SCK,SI, UCK P00 to P07, P10 to P17, P20 to P23, P30 P00 to P07, P10 to P17, P20 to P23, P30, RST P00 to P07, P10 to P17, P20 to P23, P30, P31, MODA P00 to P07, P10 to P17, P20 to P23, P30, RST At normal operating (External clock, Max gear speed) Condition Value Min 0.7 VCC Typ Max VCC+0.3 Unit V Remarks
Parameter
Symbol
VIH "H" level input voltage
VIHS
0.8 VCC
VCC+0.3
V
VIL "L" level input voltage
VSS-0.3
0.3 VCC
V
VILS
VSS-0.3
0.2 VCC
V
"H" level output voltage
VOH
Vcc = 4.5V IOH = -4.0 mA Vcc = 4.5V IOL = 4.0 mA
VCC- 0.5
V
"L" level output voltage
VOL
0.4
V
Input leak current
ILI
0.45 V < VI < VCC
5
With pull-up A resistance specified
Pullup resistance
RPULL
VI = 0.0 V
25
50
100
k
When A/D convereter stops When A/D convereter starts
8 6 10 8 4 3 5
12 9 15 12 6 5 1 10 15
mA MB89215 mA MB89P215 mA MB89215 mA MB89P215 mA MB89215 mA MB89P215 A MB89215 A MB89P215 pF MB89P215 29
ICC
Power supply current
ICCS
VCC at sleep mode (External clock, When A/D Max gear convereter stops speed) At stop mode When A/D Ta = + 25 C convereter stops (External clock) Other than VCC and VSS
ICCH Input capacitance
CIN
MB89210 Series
4. AC Characteristics
(1) Reset Timing Value Min 48 tHCYL Max (VSS = 0.0 V, Ta = -40 C to +105 C) Symbol tZLZH Condition Unit ns Remarks
Parameter RST "L" level pulse width
Note : tHCYL : Oscillation clock one cycle time
tZLZH
RST
0.2 VCC 0.2 VCC
(2) Power-on reset Value Min 1 Max 50
(VSS = 0.0 V, Ta = -40 C to +105 C) Symbol tR tOFF Condition Unit ms ms For repeated operation Remarks
Parameter Power on time Power shutoff time
tR 2.0 V
tOFF
VCC
0.2 V
0.2 V
0.2 V
Note : The supply voltage must be set to minimum value required for operation within the prescribed default oscillation setting time.
30
MB89210 Series
(3) Clock Timing Value Min 1 Crystal or ceramic oscillation 80 20 CR(built-in) oscillator 8.5 Max 12.5 1000 10 11.5
(VSS = 0.0 V, Ta = -40 C to +105 C) Symbol FCH-1 tXCYL tWH tWL tCR tCF FCH-2 Condition Unit MHz ns ns ns MHz Remarks
Parameter Clock frequency Clock cycle time Input clock pulse width Input clock rise, fall time Oscillation frequency
* X0 and X1 Timing and application Conditions
tXCYL tWH tCR tCF 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC 0.2 VCC tWL
X0
* Clock application Conditions Using crystal oscillator or ceramic oscillator Using CR (built-in) oscillator
Using external clock
X0
X1
X0
X1
X0
X1
Open
Open
(4) Instruction Cycle Parameter Instruction cycle (instruction execution time) Symbol tINST Value 4/FCH, 8/FCH, 16/FCH, 64/FCH
(VSS = 0.0 V, Ta = -40 C to +105 C) Unit s Remarks When operating at FCH = 10 MHz tINST = 0.4 s (4/FCH)
FCH : Oscillation frequency (Operating clock frequency after switching between external and CR (internal) oscillator clocks) 31
MB89210 Series
(5) Recommended Resonator Manufactures * Sample application of ceramic resonator
X0 R X1
C1
C2
Resonator manufacture
Resonator CSTLS4M00G56-B0 CSTCR4M00G55-R0 CSTLS8M00G53-B0 CSTCC8M00G53-R0 CSTLS10M0G53-B0
Frequency (MHz) 4.00 4.00 8.00 8.00 10.00
C1 built-in built-in built-in built-in built-in built-in
C2 built-in built-in built-in built-in built-in built-in
R 680 680
Murata Mfg. Co., Ltd.
CSTCC10M00G53-R0 10.00 Inquiry : * Murata Electronics North America Inc : TEL +1-404-436-1300 * Murata Europe Management GmbH : TEL +49-911-66870 * Murata Electronics Singapore (p/e) : TEL +65-758-4233
32
MB89210 Series
(6) Peripheral Input Timing
(VCC = 5.0 V 10%, VSS = 0.0 V, Ta = -40 C to +105 C) Symbol tILIH tIHIL Pin name INT0 to INT2, EC0, EC1 Value Min 2 tINST* 2 tINST* Max Unit s s Remarks
Parameter Peripheral input "H" pulse width Peripheral input "L" pulse width
*: For tINST see " (4) Instruction Cycle".
tILIH
tIHIL
INT0 to INT2, EC0 to EC1
0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC
33
MB89210 Series
(7) Serial I/O Timing
(VCC = 5.0 V 10%, VSS = 0.0 V, Ta = -40 C to +105 C) Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX Pin name SCK SCK, SO SCK, SI SCK, SI SCK SCK SCK, SO SCK, SI SCK, SI External clock operation Internal clock operation Condition Value Min 2 tINST* - 200 0.5 tINST* 0.5 tINST* tINST* tINST* 0 0.5 tINST* 0.5 tINST* Max 200 200 Unit Remarks s ns s s s s ns s s
Parameter Serial clock cycle time SCK SO time Valid SI SCK SCK Valid SI hold time Serial clock "H" pulse width Serial clock "L" pulse width SCK SO time Valid SI SCK SCK Valid SI hold time
*: For tINST see " (4) Instruction Cycle". * Internal shift clock mode
tSCYC 2.4 V
SCK
0.8 V tSLOV
0.8 V
SO
2.4 V 0.8 V tIVSH tSHIX
SI
0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC
* External shift clock mode
tSLSH tSHSL 0.8 VCC 0.8 VCC
SCK
0.2 VCC
0.2 VCC tSLOV
SO
2.4 V 0.8 V tIVSH tSHIX
SI
0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC
34
MB89210 Series
(8) LIN-UART timing
(VCC = 5.0 V 10%, VSS = 0.0 V, Ta = -40 C to +105 C) Symbol tSCYC tSLOV tIVSH tSHIX tSLOV tSCLK tSDEL tSHSL tSLSH tSLOV tIVSH tSHIX Pin name UCK UCK, UO UCK, UI UCK, UI UCK, UO UCK (delay), UO UCK, UCK (delay) UCK UCK UCK, UO UCK, UI UCK, UI External clock operation Internal clock operation Condition Value Min 2 tINST* - 200 0 0.5 tINST* - 200 - 0.5 tINST* 0.5 tINST* 1.5 tINST* 1.5 tINST* tINST* 0 0.5 tINST* Max 200 200 Unit Remarks s ns s s ns s s s s s s s SCDE = 1 SCDE = 1 SCDE = 1
Parameter Serial clock cycle time UCK UO time Valid UI UCK UCK Valid UI hold time UCK UO time UCK (delay) UO time UCK UCK (delay) Serial clock "H" pulse width Serial clock "L" pulse width UCK UO time Valid UI UCK UCK Valid UI hold time
35
MB89210 Series
*: For tINST see " (4) Instruction Cycle". * Internal shift clock mode
tSCYC 2.4 V
UCK
0.8 V tSLOV
0.8 V
UO
2.4 V 0.8 V tIVSH tSHIX
UI
0.7 VCC 0.7 VCC 0.3 VCC 0.3 VCC tSCLK
UCK(delay) SCDE=1
2.4 V 0.8 V tSDEL 0.8 V
* External shift clock mode
tSLSH tSHSL 0.8 VCC 0.8 VCC
UCK
0.2 VCC
0.2 VCC tSLOV
UO
2.4 V 0.8 V tIVSH tSHIX
UI
0.7 VCC 0.7 VCC 0.3 VCC 0.3 VCC
36
MB89210 Series
5. A/D Converter
(1) A/D converter electrical characteristics (VCC = 5.0 V + 10%, VSS = 0.0 V, Ta = -40 C to +105 C) Value Min - 5.0 - 3.0 - 2.5 VOT VFST IAIN VSS - 3.5 LSB VCC - 6.5 LSB 0 Typ VSS + 0.5 LSB VCC - 1.5 LSB Max 10 + 5.0 + 3.0 + 2.5 VSS + 4.5 LSB VCC + 2.0 LSB 38 tINST* 10 VCC Unit bit LSB LSB LSB V V s A V Remarks
Parameter Resolution Total error Linearity error Differential linear error Zero transition voltage Full-scale transition voltage A/D mode conversion time Analog input current Analog input voltage range
Symbol
* : For tINST see " (4) Instruction Cycle" in "4. AC Characteristics".
37
MB89210 Series
(2) Definition of A/D Converter Terms * Resolution The level of analog variation that can be distinguished by the A/D converter. When the number of bits is 10, analog voltage can be divided into 210 = 1024. * Linear error (Unit : LSB) The deviation between the value along a straight line connecting the zero transition point("00 0000 0000""00 0000 0001") of a device and the full-scale transition point ("11 1111 1111""11 1111 1110"), compared with the actual conversion values obtained. * Differential linear error (Unit : LSB) Deviation of input voltage, which is required for changing output code by 1 LSB, from an ideal value. * Total error (Unit : LSB) The difference between theoretical conversion value and actual conversion value. Ideal I/O characteristics
3FF 3FE VFST 3FF 3FE 1.5 LSB
Total error
Digital output
Digital output
3FD
3FD
Actual conversion characteristic
{1 LSB x N + 0.5 LSB}
004 003 002 001 0.5 LSB VSS VCC VOT 1 LSB
004 003 002 001 VSS
Actual conversion characteristic
VNT
Ideal characteristics
VCC
Analog input VFST - VOT 1022
Analog input VNT - {1 LSB x N + 0.5 LSB} 1 LSB
1 LSB =
(V)
Total error in digital output N =
(Continued)
38
MB89210 Series
(Continued)
Zero transition error
004
Full-scale transition error Ideal characteristics
Actual conversion characteristic Ideal characteristics Digital output
3FF
Digital output
003
Actual conversion characteristic
3FE
002
Actual conversion characteristic
001
VFST
3FD
(measurement value)
VOT (measurement value)
VSS
3FC
Actual conversion characteristic
VCC
Analog input
Analog input
Linearity error
3FF 3FE
Differential linear error Ideal characteristics
N+1
Actual conversion characteristic
{1 LSB x N + VOT}
Digital output
VFST
(measureVNT ment value)
Digital output
3FD
Actual conversion characteristic
V (N + 1) T
N
004 003 002 001 VSS
Actual conversion characteristic Ideal characteristics VOT (measurement value)
VCC
N-1
VNT
N-2 VSS
Actual conversion characteristic
VCC
Analog input Linear error in digital = VNT - {1 LSB x N + VOT} output N 1 LSB
Analog input Differential linear error = V (N + 1) T - VNT in digital output N 1 LSB
-1
39
MB89210 Series
(3) Precautionary Information of A/D conversion
* Input Impedance of Analog Input Pins
The A/D converter has a sample & hold circuit as shown below, which uses a sample-and-hold capacitor to obtain the voltage at the analog input pin for 16 instruction cycles following the start of A/D conversion. For this reason if the external circuits providing the analog input signal have high output impedance, the analog input voltage may not stabilize within the analog input sampling time. It is therefore recommended that the output impedance of external circuits be reduced to 4 k or less. Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 F for the analog input pin. Analog input equivalent circuit Sample-and-hold circuit Analog input pin
R C
Comparator
If analog input impedance is 4 k or more, the use of a capacitor of approximately 0.1 F is recommended. MB89215 MB89P215 R = approx. 2.2 k, R = approx. 3.2 k,
Closes 16 instruction cycles after the start of A/D conversion Analog channel selector C = approx. 45 pF C = approx. 30 pF
* About errors The smaller the absolute value |VCC - VSS| is, the greater the relative error becomes.
40
MB89210 Series
s MASK OPTIONS
No Part number Specifying procedure Initial value* selection of internal clock oscillation stabilization wait time (at FCH = 10 MHz) * 01 : 214/FCH (Approx. 1.63ms) * 10 : 217/FCH (Approx. 13.1ms) * 11 : 218/FCH (Approx. 26.2ms) Power-on reset * Power-on reset ON * Power-on reset OFF Reset pin output * Reset output ON * Reset output OFF MB89215 MB89P215 Setting disallowed MB89PV210
1
218/Fch (Approx. 26.2 ms)
2
Yes
3
Yes
FCH : Base oscillator * : Initial value to which the oscillation setting time bit (sync : WT1, WT0) in the system clock control register is set.
s ORDERING INFORMATION
Part number MB89215PFV MB89P215PFV MB89PV210CF Package 30-pin Plastic SSOP (FPT-30P-M02) 48-pin Ceramic MQFP (MQP-48C-P02) Remarks
41
MB89210 Series
s PACKAGE DIMENSIONS
30-pin Plastic SSOP (FPT-30P-M02)
* 9.700.10(.382.004)
Note 1) *1 : Resin protrusion. (Each side +0.15 (.006) Max) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
1.25 -0.10
+0.20 +.008 (Mounting height) .049 -.004 0.10(.004)
INDEX
5.600.10 (.220.004)
7.600.20 (.299.008)
6.60(.260) NOM
0.650.12(.0256.0047)
0.22 -0.05 .009
+0.10 +.004 -.002
"A"
0.15 -0.02 .006 -.001
+0.05 +.002
Details of "A" part 0.100.10(.004.004) (STAND OFF)
9.10(.358)REF 0 10 0.500.20 (.020.008)
C
1994 FUJITSU LIMITED F30003S-2C-3
Dimensions in mm (inches) Note : The values in parentheses are reference values.
(Continued)
42
MB89210 Series
(Continued) 48-pin Ceramic MQFP (MQP-48C-P02)
15.000.25 SQ (.591.010) SQ 14.820.35 SQ (.583.014) SQ 1.020.13 (.040.005) 1.020.13 (.040.005) 0.400.10 (.016.004) 10.92(.430) TYP 7.14(.281) TYP 1.00(.040)TYP 1.50(.059)TYP 0.30(.012) TYP 4.50(.177)TYP 7.14(.281) TYP 10.92(.430) TYP 1.10 -0.25 +.018 .043 -.010
+0.45
17.20(.677)TYP 8.80(.346)TYP 1.10 .043
+0.45 -0.25 +.018 -.010
0.30(.012)TYP PIN No.1 INDEX
0.800.25 (.0315.010)
0.800.25 (.0315.010)
INDEX AREA
17.20(.677) TYP 8.80(.346) TYP
1.00(.040)TYP 0.400.10 (.016.004) 1.50(.059)TYP
9.02(.355)MAX
0.150.05 (.006.002)
C
2003 FUJITSU LIMITED M48002Sc-1-1
Dimensions in mm (inches) Note : The values in parentheses are reference values.
43
MB89210 Series
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party's intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0303 (c) FUJITSU LIMITED Printed in Japan

▲Up To Search▲

Price & Availability of MB89215MB89P215MB89PV210

	To Download MB89215MB89P215MB89PV210 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .